In recent years, along with an increase in demands for lightweight, thin and highly responsive display, there has been an intensification of research and development efforts regarding organic EL (electroluminescent) displays and FEDs (Field Emission Display).
Because driving period, ambient temperature and the like wield a great influence on a relation between luminance and voltage in organic EL elements, it is difficult to suppress variations in luminance through a voltage-controlled driving method. On the other hand, luminance and current have a proportionality relation in organic EL elements, and influence of external factors such as ambient temperature is limited. As a result, current-controlled driving methods are the most often used as driving methods in organic EL displays.
In this regard, in the case of such display devices, a TFT (Thin Film Transistor) is used as a switching element included in a pixel circuit and in a driving circuit. Further, in such a TFT, amorphous silicon, low-temperature polycrystalline silicon, CG (Continuous Grain) silicon and the like are used.
However, regarding TFTs, such a problem occurs that, in general, variations in characteristics (driving abilities) such as threshold value (threshold voltage) and mobility are likely to occur.
Especially, in the case of polycrystalline silicon (p-Si), which is mainly used in small-sized appliances such as portable telephones, variations in characteristics are likely to occur at a joint of laser-scanned areas, because a manufacture operation of polycrystalline silicon includes laser annealing. In other words, when applied to a panel, an area annealed during one laser scan (laser irradiation) is relatively homogeneous. However, variations in TFT characteristics at a face of a border of the laser scanned-area are easily noticeable as streaked image defects. Further, in some cases, variations in TFT characteristics also occur in the area annealed during one laser scan (laser irradiation), resulting in display unevenness in an image.
Conventional methods to compensate such variations in characteristics include the following: (1) a method in which a circuit to compensate the variations in characteristics is provided inside a pixel circuit; and (2) a method in which a compensation function is provided externally.
For example, Patent Literature 1 discloses a configuration, using the above method (1), of a pixel circuit in an organic EL display device.
FIG. 9 is an explanatory view showing a circuit configuration of a pixel circuit disclosed in Patent Literature 1. The pixel circuit 100 shown on this figure includes a driving TFT 110, switching TFTs 120, 130, and 140, capacitors 150 and 160, and an organic electroluminescent element (organic electroluminescent display, OLED) 170. Both TFTs are P-channel TFTs.
A source terminal of the driving TFT 11 is connected to a power supply line 184 (+VDD), and a drain terminal of the driving TFT 11 is connected to a source terminal of the switching TFT 130. Further, a drain terminal of the switching TFT 130 is connected to a GND (ground, common cathode) via the organic EL element 170. Further, a gate terminal of the driving TFT 110 is connected to one terminal of the capacitor 160, and the other terminal of the capacitor 160 is connected to a drain terminal of the switching TFT 140. Further, a source terminal of the switching TFT 140 is connected to a data line 180, and a gate terminal of the switching TFT 140 is connected to a select line 181. Further, a source terminal of the switching TFT 120 is connected between the gate terminal of the driving TFT 110 and the capacitor 160; a drain terminal of the switching TFT 120 is connected between the drain terminal of the driving TFT 110 and a source terminal of the switching terminal 130; a gate terminal of the switching terminal 120 is connected to an auto-zero line 182. Further, a gate terminal of the switching TFT 130 is connected to an illumination line 183. Further, one terminal of the capacitor 150 is connected to the power supply line 184, and the other terminal is connected between the gate terminal of the driving TFT 110 and the capacitor 160.
FIG. 10 is an explanatory drawing showing an operation timing of the pixel circuit 100.
In a first period, the auto-zero line 182 and the illumination line 183 are set to have a “low” potential. This makes the switching TFT 120 and the switching TFT 130 conductive, and makes potentials of the drain terminal and the gate terminal of the driving TFT 110 identical. At that time, the driving TFT 110 also becomes conductive, and a current starts flowing from the power supply line 184 to the organic EL element 170 via the driving TFT 110 and the switching TFT 130. At that time, a data line 180 is set to have a reference potential Vstd; further, the select line 181 is set to have a “low” potential and a terminal of the capacitor 160 which is closer to the switching TFT 140 is set to have a reference potential Vstd.
Next, in a second period, the switching TFT 130 is rendered nonconductive by setting the illumination line 183 to have a “high” potential. In such a nonconductive state, a current from the power supply line 184 flows into the gate terminal of the driving TFT 110, via the driving TFT 110 and the switching TFT 120. Then, the potential of the gate terminal of the driving TFT 110 gradually increases; when the potential of the gate terminal of the driving TFT 110 reaches a value (+VDD+Vth) corresponding to a threshold value voltage Vth (Vth being a negative value, and a voltage between the gate and the source of the driving TFT 110), the driving TFT 110 becomes nonconductive.
In a third period, the switching TFT 120 is rendered nonconductive by setting the auto-zero line 182 to have a “high” potential. This makes a difference between a potential of the gate terminal of the switching TFT 120 and the reference potential at that time, and the difference is stored in the capacitor 160. In other words, when a potential of the data line 180 is equal to a reference potential Vstd, the potential of the gate terminal of the driving TFT 110 becomes a value (+VDD+Vth) corresponding to a threshold value state (i.e. a state in which a potential difference between the gate and the source of the driving TFT 110 is the threshold value voltage Vth).
In a fourth period, the potential of the data line 180 is changed from the reference potential Vstd to a data potential Vdata. In this state, the potential of the gate terminal of the driving TFT 110 is changed only by a value equal to a difference in potential between the reference potential Vstd and the data potential Vdata.
During the third period, the driving TFT 110 is set to a threshold value state, so that flows a current corresponding to the difference in potential between the reference potential Vstd and the data potential Vdata. Accordingly, it is possible to determine a current depending on the difference in potential between the reference potential Vstd and the data potential Vdata, regardless of the threshold value voltage Vth of the driving TFT 110.
Subsequently, in a fifth period, the switching TFT 140 is rendered nonconductive by setting the select line 181 to have a “high” potential. Thus, the potential of the gate terminal of the driving TFT 110 is maintained as a voltage between terminals of the capacitor 150, and the selection period of the pixel circuit 100 is finished.
Subsequently, by setting the illumination line 183 to have a “low” potential, the current set as above during the fourth period flows in the organic EL element 170 via the driving TFT 110.
This way, in the pixel circuit 100 shown in FIG. 9, because the current flowing in the driving TFT 110 is determined without being influenced by variations of the threshold value voltage Vth, it becomes possible to set up the current to be outputted to the organic EL element 170 without having to take into account variations of the threshold value voltage of the TFT.
Further, as an example of the above method (2), Patent Literature 2 discloses the following technology: a current capability of each driving element is measured and stored in a memory provided on an external circuit; a data potential supplied to each pixel at the time of panel display is modified in line with the capability of the driving element. Specifically, in Patent Literature 2, a current measurement element is provided for each power supply line supplying a current to an organic EL element of each pixel circuit; a scanning voltage is applied to one scanning line; in synchronization with the application, a predetermined data potential is supplied to each data line, and a current value of a current flowing in the organic EL element is measured by the current measurement element; subsequently, the scanning voltage is applied to the scanning line mentioned above, a data signal setting an electro-optical element to level 0 is supplied to each data line in synchronization with the application, and a current value of a current flowing in the organic EL element is measured by the current measurement element with respect to each scanning line; based on the current thus measured, the data potential to be applied to an active element of each pixel is corrected.